Integrated circuits are being manufactured with increasingly more transistors. As the transistor count goes up, static leakage power (i.e. power consumption due to static current leakage) also increases. One way to reduce the static leakage power is to operate the integrated circuit at a lower supply voltage. Another way to reduce the static leakage power is to manufacture the transistors with relatively higher threshold voltages. However, both of these techniques can lower the operating speed of the integrated circuits.
Some integrated circuits are designed having a lower power mode, such as an idle mode, of operation as compared to a normal operating mode to reduce static power consumption during times of little or no activity. It is sometimes desirable during low power operation to retain the logic state of certain storage elements so that the integrated circuit can return to a normal operating mode without loss of the information stored at the storage elements. One technique used to retain information is to store the information in a separate memory array before entering the low power mode and to provide sufficient power to the separate memory array during the low power mode to maintain the stored information. However, the memory array can be undesirably large and complex as the amount of information to be retained becomes large. Therefore, an improved storage device would desirable.